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cy7c68300 cypress semiconductor corporation ? 3901 north first street san jose ca 95134 408-943-2600 document #: 38-08011 rev. *a revised august 30, 2002 cy7c68300 ez-usb at2? usb 2.0 to ata/atapi bridge
cy7c68300 document #: 38-08011 rev. *a page 2 of 26 contents 1.0 introduction .............................................................................................................. ................ 4 1.1 features .................................................................................................................. ......................... 4 2.0 pin assignments ........................................................................................................... ............. 6 2.1 pin diagram ............................................................................................................... ...................... 6 2.2 pin descriptions .......................................................................................................... ................... 8 2.3 additional pin descriptions ............................................................................................... .......... 10 3.0 applications .............................................................................................................. ............... 11 3.1 additional resources ...................................................................................................... ............. 11 4.0 functional overview ....................................................................................................... ..... 11 4.1 usb signaling speed ....................................................................................................... ............ 11 4.2 ata interface ............................................................................................................. ................... 11 5.0 enumeration ............................................................................................................... .............. 11 5.1 board manufacturing test mode ............................................................................................. .... 11 5.2 normal operation mode ..................................................................................................... .......... 13 5.3 eeprom organization ....................................................................................................... .......... 13 6.0 absolute maximum ratings ................................................................................................ 22 7.0 operating conditions [3] ......................................................................................................... 22 8.0 dc characteristics ........................................................................................................ ....... 22 9.0 ac electrical characteristics ....................................................................................... 22 9.1 usb transceiver ........................................................................................................... ................ 22 9.2 ata timing ................................................................................................................ .................... 22 10.0 ordering information ..................................................................................................... ... 23 11.0 package diagrams ......................................................................................................... ...... 23 12.0 pcb layout recommendations [4] ........................................................................................................................... ...........24 13.0 quad flat package no leads (qfn) package design notes ................................ 24 14.0 other design considerations ......................................................................................... 25 14.1 proper power-up sequence ................................................................................................. ...... 25 14.2 ide removable media devices .............................................................................................. .... 25 14.3 devices with small buffers ............................................................................................... ........ 25 list of figures figure 1-1. block diagram ...................................................................................................... .............. 5 figure 2-1. 56-pin ssop ........................................................................................................ ................ 6 figure 2-2. 56-pin qfn ......................................................................................................... ................. 7 figure 2-3. xtalin, xtalout diagram ............................................................................................ 10 figure 2-4. typical reset circuit .............................................................................................. .......... 10 figure 11-1. 56-lead shrunk small outline package 056 ................................................................. 23 figure 11-2. 56-lead quad flatpack no lead (8 x 8 mm) lf56 ........................................................ 23 figure 13-1. cross-section of the area underneath the qfn package .......................................... 24 figure 13-2. plot of the solder mask (white area) ............................................................................. 2 5 figure 13-3. x-ray image of the assembly ....................................................................................... .25
cy7c68300 document #: 38-08011 rev. *a page 3 of 26 list of tables table 5-1. command block wrapper .............................................................................................. .. 11 table 5-2. example cfgcb ...................................................................................................... ........... 12 table 5-3. example mfgcb ...................................................................................................... ........... 12 table 5-4. mfg_load data format ............................................................................................... ....... 12 table 5-5. mfg_read data format ............................................................................................... ....... 13 table 5-6. eeprom organization ................................................................................................ ...... 14
cy7c68300 document #: 38-08011 rev. *a page 4 of 26 1.0 introduction the ez-usb at2 ? implements a fixed function bridge between one usb port and one ata- or atapi-based mass storage device port. this bridge adheres to the mass storage class bulk-only transport specification and is intended for self-powered devices. the usb port of the ez-usb at2 is connected to a host computer directly or via the downstream port of a usb hub. host software issues commands and data to the ez-usb at2 and receives status and data from the ez-usb at2 using standard usb protocol. the ata/atapi port of the ez-usb at2 is connected to a mass storage device. a 4kbyte buffer maximizes ata/atapi data transfer rates by minimizing losses due to device seek times. the ata interface supports ata pio modes 0, 3, and 4, and ultra dma modes 2 and 4. the device initialization process is configurable, enabling the ez-usb at2 to initialize ata/atapi devices without software intervention. 1.1 features complies with usb-if specifications for usb 2.0, the usb mass storage class, and the usb mass storage class bulk-only transport operates at high (480 mbps) or full (12 mbps) speed complies with t13 ? s ata/atapi-6 draft specification supports 48-bit addressing for large hard drives supports pio modes 0, 3, 4, and udma modes 2, 4 uses one external serial eeprom containing the usb device serial number, vendor and product identification data, and device configuration data ata interface irq signal support support for ata/atapi devices configured either as master or slave ? ata-enable ? input signal, which three-states all signals on the ata interface in order to allow sharing of the bus with another controller (e.g., an ieee-1394 to ata bridge chip) support for board-level manufacturing test via usb interface 3.3v operation for self-powered devices 56-pin ssop and 56-pin qfn packages
cy7c68300 document #: 38-08011 rev. *a page 5 of 26 usb 2.0 xcvr cy smart usb fs/hs engine 4kbyte fifo pll i2c-compati bl e bus controller ata interface logic data control 24 mhz xtal 16 bit ata data a t a _ e n ( a t a i n t e r f a c e 3 - s t a t e ) vbus d+ d- at2 internal logic reset scl sda ata interface control signals figure 1-1. block diagram
cy7c68300 document #: 38-08011 rev. *a page 6 of 26 2.0 pin assignments 2.1 pin diagram figure 2-1. 56-pin ssop 24 23 20 21 22 19 18 17 14 15 16 13 12 11 8 9 10 7 6 5 2 3 4 1 26 28 25 27 33 34 37 36 35 38 39 40 43 42 41 44 45 46 49 48 47 50 51 52 55 54 53 56 31 29 32 30 dd3 dd2 dd1 dd0 vcc sda scl reserved pu10k gnd vcc gnd dd4 dd5 dd6 dd7 gnd vcc gnd diow# dior# dmack# vcc intrq dminus dplus vcc agnd da0 da1 da2 cs0# xtalin xtalout avcc dmarq cs1# vbus_pwr_valid areset# gnd iordy gnd vcc nc reset# vcc ata_en dd8 gnd dd15 dd14 dd13 dd9 dd10 dd11 dd12 ez-usb at2 cy7c68300
cy7c68300 document #: 38-08011 rev. *a page 7 of 26 figure 2-2. 56-pin qfn ez-usb at2 cy7c68300 56-pin qfn gnd vcc gnd dminus dmarq dplus vcc agnd iordy avcc xtalin xtalout pu10k reserved nc gnd dd15 dd14 ata_en dd13 dd12 dd11 vcc dd8 dd10 dd9 vcc gnd vcc dd0 dd1 dd2 vcc dd3 dd4 dd5 gnd gnd dd6 dd7 sda scl dmack# vcc intrq da0 gnd da1 da2 cs0# reset# areset# cs1# vbus_pwr_valid dior# diow# 31 32 33 34 41 35 36 37 42 40 38 39 30 29 17 18 19 20 27 21 22 23 28 26 24 25 16 15 12 11 10 9 2 8 7 6 1 3 5 4 13 14 54 53 52 51 44 50 49 48 43 45 47 46 55 56
cy7c68300 document #: 38-08011 rev. *a page 8 of 26 2.2 pin descriptions ssop pin qfn pin pin name pin type default state at start-up pin description 1 50 dd13 i/o [1] hi-z ata data bit 13. 2 51 dd14 i/o [1] hi-z ata data bit 14. 3 52 dd15 i/o [1] hi-z ata data bit 15. 4 53 gnd gnd ground. 5 54 nc hi-z reserved. this pin should remain a no-connect. 6 55 v cc pwr v cc . connect to 3.3v power source. 7 56 gnd gnd ground. 8 1 iordy i [1] i ata control. 9 2 dmarq i [1] i ata control. 10 3 av cc pwr analog v cc . connect the v cc through the shortest path possible. 11 4 xtalout xtal xtal 24-mhz crystal output (see subsection 2.3.3). 12 5 xtalin xtal xtal 24-mhz crystal input (see subsection 2.3.3). 13 6 agnd gnd analog ground. connect to ground with as short a path as possible. 14 7 v cc pwr v cc . connect to 3.3v power source. 15 8 dplus i/o pulled high at reset. when the firmware starts, the pullup is controlled by pin 46(ssop)/39(qfn). when vbus_pwr_valid is high, the line is pulled up. vbus_pwr_valid is polled at start-up and then every 20ms. usb d+ signal (see subsection 2.3.1). 16 9 dminus i/o hi-z usb d- signal (see subsection 2.3.1). 17 10 gnd gnd ground. 18 11 v cc pwr v cc . connect to 3.3v power source. 19 12 gnd gnd ground. 20 13 pu10k hi-z tied to 10k 5% pull-up resistor. 21 14 reserved reserved. tie to gnd. 22 15 scl o scl/sda will be ac- tive for several ms at start-up. then driven high. clock signal for i 2 c-compatible interface (see 2.3.2). 23 16 sda i/o data signal for i 2 c-compatible interface (see 2.3.2). 24 17 v cc pwr v cc . connect to 3.3v power source. 25 18 dd0 i/o hi-z ata data bit 0. 26 19 dd1 i/o hi-z ata data bit 1. 27 20 dd2 i/o hi-z ata data bit 2. 28 21 dd3 i/o hi-z ata data bit 3. 29 22 dd4 i/o hi-z ata data bit 4. 30 23 dd5 i/o hi-z ata data bit 5. notes: 1. ata interface pins are not active when ata_en is not asserted.
cy7c68300 document #: 38-08011 rev. *a page 9 of 26 31 24 dd6 i/o hi-z ata data bit 6. 32 25 dd7 i/o hi-z ata data bit 7. 33 26 gnd gnd ground. 34 27 v cc pwr v cc . connect to 3.3v power source. 35 28 gnd gnd ground. 36 29 diow# [2] o/z [1] driven high (cmos) ata control. 37 30 dior# o/z [1] driven high (cmos) ata control. 38 31 dmack# o/z [1] driven high (cmos) ata control. 39 32 v cc pwr v cc . connect to 3.3v power source. 40 33 intrq i [1] input ide ata interrupt request. 41 34 da0 o/z [1] driven high after 2ms delay ata address. 42 35 da1 o/z [1] driven high after 2ms delay ata address. 43 36 da2 o/z [1] driven high after 2ms delay ata address. 44 37 cs0# o/z [1] driven high after 2ms delay ata chip select. 45 38 cs1# o/z [1] driven high after 2ms delay ata chip select. 46 39 vbus_pwr_valid i input vbus detection. indicates to the ez-usb at2 that vbus power is present. 47 40 areset# o/z [1] ata reset. 48 41 gnd gnd ground. 49 42 reset# i active low reset. resets the entire chip. this pin is normally tied to vcc through a 100k resistor, and to gnd through a 0.1-f capacitor, supplying a 10-ms reset. 50 43 v cc pwr v cc . connect to 3.3v power source. 51 44 ata_en i input - if at2 is not in mfg mode, polled every 20 ms after start-up. if low, ssop: pins 36-38, 41-45 and 47 are three-stated. qfn: pins 29-31, 34-38 and 40 are three-stated. active high. ata interface enable. allows ata bus sharing with other host devices. setting ata_en=1 enables the ata interface for normal operation. disabling ata_en three- states (high-z) the ata interface and halts the ata interface state machine logic. 52 45 dd8 i/o [1] hi-z ata data bit 8. 53 46 dd9 i/o [1] hi-z ata data bit 9. 54 47 dd10 i/o [1] hi-z ata data bit 10. 55 48 dd11 i/o [1] hi-z ata data bit 11. 56 49 dd12 i/o [1] hi-z ata data bit 12. note: 2. a # sign after the signal name indicates it is an active low signal. 2.2 pin descriptions (continued) ssop pin qfn pin pin name pin type default state at start-up pin description
cy7c68300 document #: 38-08011 rev. *a page 10 of 26 2.3 additional pin descriptions 2.3.1 dplus, dminus dplus and dminus are the usb signaling pins, and they should be tied to the d+ and d ? pins of the usb connector. because they operate at high frequencies, the usb signals require special consideration when designing the layout of the pcb. 2.3.2 scl, sda the clock and data pins for the i 2 c-compatible port should be connected to your configuration eeprom and to v cc through 2.2k resistors. 2.3.3 xtalin, xtalout the ez-usb at2 requires a 24-mhz signal to derive internal timing. typically a 24-mhz parallel-resonant fundamental mode crystal is used, but a 24-mhz square wave from another source can also be used. if a crystal is used, connect the pins to xtali n and xtalout, and also through 20-pf capacitors to gnd. if an alternate clock source is used, apply it to xtalin and leave xtalout open. 2.3.4 ata_en ata_en allows bus sharing with other host devices. setting ata_en = 1 enables the ata interface for normal operation. setting ata_en = 0 disables (high-z) the ata interface pins and removes the ez-usb at2 from the usb. the ata_en pin is sampled at a rate of 60 times per second by the ez-usb at2 internal logic. this pin should be set to a high at start-up. upon a high to low transition all ez-usb at2 ata signals are tri-stated, usb is disconnected, and the ez-usb at2 enters an idle state until an active reset is received, or the ata_en pin transitions back to a high state. upon sensing the low to high transition the ez-usb at2 will return to the post reset operational state, and will reconnect to usb. note that disabling the ata bus with the ata_en pin during the middle of a data transfer will result in data loss and can cause the operating system on the host compute r to crash. 2.3.5 ata interface pins design practices as outlined in the ata/atapi -6 specification for signal integrity should be followed with systems that utiliz e a ribbon cable interconnect between the ez-usb at2 ? s ata interface and the attached ata/atapi device, especially if ultra dma mode is utilized. 2.3.6 vbus_pwr_valid vbus_pwr_valid indicates to the ez-usb at2 that power is present on vbus. 2.3.7 reset# asserting reset# for 10 ms will reset the entire chip. this pin is normally tied to v cc through a 100k resistor, and to gnd through a 0.1- f capacitor. figure 2-4. typical reset circuit 24mhz crystal 20pf 20pf figure 2-3. xtalin, xtalout diagram c1 0.1 ufd nreset r8 100k
cy7c68300 document #: 38-08011 rev. *a page 11 of 26 3.0 applications the ez-usb at2 is a high-speed usb 2.0 peripheral device that connects ata or atapi storage devices to a usb host using the usb mass storage class protocol. 3.1 additional resources cy4615 ez-usb at2 reference design kit usb specification version 2.0 ata specification t13/1410d rev 3b universal serial bus mass storage class bulk only transport specification, http://www.usb.org/devel- opers/data/devclass/usbmassbulk_10.pdf. 4.0 functional overview 4.1 usb signaling speed ez-usb at2 operates at two of the three rates defined in the universal serial bus specification revision 2.0 dated april 27, 20 00: full speed, with a signaling bit rate of 12 mbits/sec high speed, with a signaling bit rate of 480 mbits/sec. ez-usb at2 does not support the low-speed signaling rate of 1.5 mbits/sec. 4.2 ata interface the ata/atapi port on the ez-usb at2 is compliant with the information technology at attachment with packet interface 6 (ata/atapi-6) specification, t13/1410d rev 3b. the ez-usb at2 supports both atapi packet commands over usb. addition- ally, the ez-usb at2 translates atapi sff-8070i commands to ata commands for seamless integration of ata devices with generic mass storage class bot drivers. 5.0 enumeration during the power-up sequence, internal logic checks the i 2 c-compatible port for an eeprom whose first two bytes are both 0x4d. if a valid signature is found, the ez-usb at2 uses the values stored in the eeprom to configure the usb descriptors for normal operation. if an invalid eeprom signature is read, or if no eeprom is detected, the ez-usb at2 defaults into board manufacturing test mode. the two modes of operation are described in subsections 5.1 and 5.2, below. 5.1 board manufacturing test mode in board manufacturing test mode, the chip behaves as a usb 2.0 device but the ata/atapi interface is not active. the ez-usb at2 allows for reading and writing an eeprom and for board level testing through vendor specific atapi commands utilizing the cbw command block as described in the usb mass storage class bulk only transport specification. there is a vendor-specific atapi command for the eeprom access (cfgcb) and one for the board level testing (mfgcb). 5.1.1 cfgcb the cfg_load and cfg_read vendor-specific commands are passed down through the bulk pipe in the cbwcb portion of the cbw. the format of this cfgcb is shown below. byte 0 will be a vendor-specific command designator whose value is configurable and set in the configuration data (eeprom address 0x04). byte 1 must be set to 0x26 to identify cfgcb. byte 2 is reserved and must be set to zero. byte 3 is used to determine the memory source to write/read. for the ez-usb at2, this byte must be set to 0x02, meaning the eeprom. bytes 4 and 5 will be used to determine the start address. for the ez-usb at2, this must always be 0x0000. bytes 6 through 15 are reserved and should be set to zero. the data transferred to the eeprom must be in the format specified in table 5-6 of this data sheet. maximum data transfer size is 255 bytes. the data transfer length is determined by the cbw data transfer length specified in bytes 8 through 11 (dcbwdatatransfer- length) of the cbw. the type/direction of the command will be determined by the direction bit specified in byte 12, bit 7 (bmcb - wflags) of the cbw. table 5-1. command block wrapper 7 6 54321 0 0 ? 3 dcbwsignature 4 ? 7dcbwtag
cy7c68300 document #: 38-08011 rev. *a page 12 of 26 5.1.2 mfgcb the mfg_load and mfg_read vendor-specific commands will be passed down through the bulk pipe in the cbwcb portion of the cbw. the format of this mfgcb is shown below. byte 0 is a vendor-specific command designator whose value is configurable and set in the configuration data. byte 1 must be 0x27 to identify mfgcb. byte 2 ? 15 are reserved and must be set to zero. the data transfer length will be determined by the cbw data transfer length specified in bytes 8 through 11 (dcbwdatatrans- ferlength) of the cbw. the type/direction of the command is determined by the direction bit specified in byte 12, bit 7 (bmcbw- flags) of the cbw. 5.1.2.1 mfg_load during a mfg_load, the ez-usb at2 goes into manufacturing test mode. manufacturing test mode is provided as a means to implement board or system level interconnect tests. during manufacturing test mode operation, all outputs not directly associat ed with usb operation are controllable. normal control of the output pins are disabled. control of the select ez-usb at2 io pins and their 3-state controls are mapped to the atapi data packet associated with this request. (see the following table for expla - nation of the required mfg_load data format.) this requires a write of 7 bytes. to exit manufacturing test mode, a hard reset (#reset) is required. 8 ? 11 (08h-0bh) dcbwdatatransferlength 12 (0ch) bwcbwflags dir obsolete reserved (0) 13 (0dh) reserved (0) bcbwlun 14 (0eh) reserved (0) bcbwcblength 15-30 (0fh1eh) cbwcb (cfgcb or mfgcb) table 5-2. example cfgcb cfgcb byte descriptions bits 76543210 0 bvscbsignature (set in configuration bytes) 00100100 1 bvscbsubcommand (must be 0x26) 00100110 2 reserved (must be set to zero) 00000000 3 data source (must be set to 0x02) 00000010 4 start address (lsb) (must be set to zero) 00000000 5 start address (msb) (must be set to zero) 00000000 6 ? 15 reserved (must be set to zero) 00000000 table 5-3. example mfgcb mfgcb byte description bits 0 bvscbsignature (set in configuration bytes) 00100100 1 bvscbsubcommand (hardcoded 0x27) 00100111 2 ? 15 reserved (must be zero) 00000000 table 5-4. mfg_load data format byte bit(s) test/tri-state control function 00reserved 0 3:1 da[2:0] 0 5:4 cs#[1:0] 06reserved 0 7 areset# 1 0 ndiow 1 1 ndior table 5-1. command block wrapper 7 6 54321 0
cy7c68300 document #: 38-08011 rev. *a page 13 of 26 5.1.2.2 mfg_read this usb request returns a ? snapshot in time ? of select ez-usb at2 input pins. the input pin states are bit-wise mapped to the atapi data associated with this request. ez-usb at2 input pins not directly associated with usb operation can be sampled at any time during manufacturing test mode operation. see the following table for an explanation of the mfg_read data format. the data length shall always be 8 bytes. 5.2 normal operation mode in normal operation mode, the chip behaves as a usb 2.0 to ata/atapi bridge. this includes all typical usb device states (powered, configured, suspended, etc.). the usb descriptors are returned according to the values stored in the external ee- prom. an external eeprom is required for mass storage class bulk-only transport compliance, since a unique serial number is required for each device. also, cypress requires customers to use their own vendor and product ids for final products. 5.3 eeprom organization the contents of the 256-byte (2048-bit) two-wire serial eeprom are arranged as follows. the column labeled ? required con- tents ? contains the values that must be used for proper operation of the ez-usb at2. the column labeled ? suggested contents ? contains suggested values for the bytes that are defined by the manufacturer. some values, such as the vendor id and device and device serial number, must be customized to meet usb compliance. see subsection 5.1 for details on how to use vendor- specific atapi commands to read and program the eeprom. the serial eeprom must be hard-wired to address 0x04. this means that a0 and a1 of the serial eeprom must be tied to ground and that a2 must be tied to 3.3v. 1 2 ndmack 13:6reserved 1 7 dd[15:0] three-state (0 = three-state dd pins, 1 = enable dd pins). 2 7:0 dd[7:0] 3 7:0 dd[15:8] 47:0reserved 57:0reserved 67:0reserved table 5-5. mfg_read data format byte bit(s) test/tri-state control function 00intrq 0 5:1 reserved. this data should be ignored. 0 6 vbus_pwr_valid 0 7 areset# (output value only) 1 2:0 reserved. this data should be ignored. 1 3 iordy 14dmarq 1 5 ata_en 1 6 reserved. this data should be ignored. 1 7 dd[15:0] tri-state 2 7:0 dd[7:0] 3 7:0 dd[15:8] 4 7:0 reserved. this data should be ignored. 5 7:0 reserved. this data should be ignored. 6 7:0 reserved. this data should be ignored. 7 7:0 reserved. this data should be ignored. table 5-4. mfg_load data format byte bit(s) test/tri-state control function
cy7c68300 document #: 38-08011 rev. *a page 14 of 26 table 5-6. eeprom organization eeprom address field name field description required contents suggested contents configuration 0x00 i 2 c-compatible memory device signature (lsb) lsb i 2 c-compatible memory device signature byte. 0x4d 0x01 i 2 c-compatible memory device signature (msb) msb i 2 c-compatible memory device signature byte. 0x4d 0x02 apm value ata device automatic power management value. if an attached ata device supports apm and this field contains other than 0x00, the ez-usb at2 will issue a set_features command to enable apm with this value during the drive initialization process. setting apm value to 0x00 disables this functionality. this value is ignored with atapi devices. 0x00 0x03 ata initialization timeout time in 128-ms granularity before the ez-usb at2 stops polling the alt stat register for reset complete and restarts the reset process (0x80 = 16.4 seconds). 0x80 0x04 ata command designator value in the first byte of the cbw cb field that designates that the cb is t o be decoded as vendor specific ata commands instead of the atapi command block. see section 4.0 for more detail on how this byte is used. 0x24 0x05 reserved bits(7:4) set to 0 0x07 busy bit delay bit (3) enables a delay of up to 120ms at each read of the drq bit where the device data length does not match the host data length. this allows the ez-usb at2 to work with most devices that incorrectly clear the busy bit before a valid status is present. short packet before stall bit (2) determines if a short packet is sent prior to the stall of an in endpoint. the usb mass storage class bulk-only speci- fication allows a device to send a short or zero-length in packet prior to returning a stall handshake for certain cases. certain host controller drivers may require a short packet prior to stall. 1 = force a short packet before stall. 0 = don ? t force a short packet before stall. srst enable bit (1) determines if the ez-usb at2 is to do a srst reset during drive initialization. note: at least one reset must be enabled. do not set srst to 0 and skip pin reset to 1at the same time. 1 = perform srst during initialization. 0 = don ? t perform srst during initialization. skip pin reset bit (0) skip ata_nreset assertion. note : srst enable must be set in conjunction with skip pin reset. setting this bit causes the ez-usb at2 to bypass areset# during initialization. all reset events except a power-on reset utilize srst as the drive mechanism. 0 = allow areset# assertion for all resets. 1 = disable areset# assertion except for power-on reset cycles.
cy7c68300 document #: 38-08011 rev. *a page 15 of 26 0x06 ata udma enable bit (7) enable ultra dma data transfer support for atapi devices. if enabled, and if the atapi device reports udma support for the indicated modes, the ez-usb at2 will utilize udma data transfers at the highest negotiated rate possible. 0 = disable ata device udma support. 1 = enable ata device udma support. 0xd4 atapi udma enable bit (6) enable ultra dma data transfer support for atapi devices. if enabled, and if the atapi device reports udma support for the indicated modes, the ez-usb at2 will utilize udma data transfers at the highest negotiated rate possible. 0 = disable atapi device udma support. 1 = enable atapi device udma support. udma modes bit (5:0) these bits select which udma modes, if supported, are enabled. setting to 1 enables. multiple bits may be set. the ez-usb at2 will operate in the highest enabled udma mode supported by the device. the ez-usb at2 supports udma modes 2 and 4 only. bit descriptions 5 reserved. must be set to 0. 4 enable udma mode 4. 3 reserved. must be set to 0. 2 enable udma mode 2. 1 reserved. must be set to 0. 0 reserved. must be set to 0. 0x07 reserved pio modes bits(7:2) bits(1:0) these bits select which pio modes, if supported, are enabled. setting to 1 enables. multiple bits may be set. the ez-usb at2 will operate in the highest enabled pio mode supported by the device. the ez-usb at2 supports pio modes 0, 3, and 4 only. pio mode 0 is always enabled by internal logic. bit descriptions 1 enable pio mode 4. 0 enable pio mode 3. 0x03 0x08 reserved must be set to 0x00. 0x00 0x09 reserved must be set to 0x00. 0x00 0x0a reserved must be set to 0x00. 0x00 0x0b reserved must be set to 0x00. 0x00 0x0c reserved must be set to 0x00. 0x00 0x0d reserved must be set to 0x00. 0x00 0x0e reserved must be set to 0x00. 0x00 0x0f reserved must be set to 0x00. 0x00 device descriptor 0x10 blength length of device descriptor in bytes. 0x12 0x11 bdescriptor type descriptor type. 0x01 0x12 bcdusb (lsb) usb specification release number in bcd. 0x00 0x13 bcdusb (msb) 0x02 0x14 bdeviceclass device class. 0x00 0x15 bdevicesubclass device subclass. 0x00 table 5-6. eeprom organization (continued) eeprom address field name field description required contents suggested contents
cy7c68300 document #: 38-08011 rev. *a page 16 of 26 0x16 bdeviceprotocol device protocol. 0x00 0x17 bmaxpacketsize0 usb packet size supported for default pipe. 0x40 0x18 idvendor (lsb) vendor id. cypress ? s vendor id may only be used for evalu- ation purposes, and not in released products. 0xb4 0x19 idvendor (msb) 0x04 0x1a idproduct (lsb) product id. 0x30 0x1b idproduct (msb) 0x68 0x1c bcddevice (lsb) device release number in bcd lsb (product release number). 0x01 0x1d bcddevice (msb) device release number in bcd msb (silicon release number). 0x00 0x1e imanufacturer index to manufacturer string. this entry must equal half of the address value where the string starts or 0x00 if the string does not exist. 0x38 0x1f iproduct index to product string. this entry must equal half of the address value where the string starts or 0x00 if the string does not exist. 0x4e 0x20 iserialnumber index to serial number string. this entry must equal half of the address value where the string starts or 0x00 if the string does not exist. the usb mass storage class bulk only transport specification requires a unique serial number (in upper case, hexidecimal characters) for each device. 0x64 0x21 bnumconfigurations number of configurations supported. 0x01 device qualifier 0x22 blength length of device descriptor in bytes. 0x0a 0x23 bdescriptor type descriptor type. 0x06 0x24 bcdusb (lsb) usb specification release number in bcd. 0x00 0x25 bcdusb (msb) usb specification release number in bcd. 0x02 0x26 bdeviceclass device class. 0x00 0x27 bdevicesubclass device subclass. 0x00 0x28 bdeviceprotocol device protocol. 0x00 0x29 bmaxpacketsize0 usb packet size supported for default pipe. 0x40 0x2a bnumconfigurations number of configurations supported. 0x01 0x2b breserved reserved for future use. must be set to zero. 0x00 high-speed configuration descriptor 0x2c blength length of configuration descriptor in bytes. 0x09 0x2d bdescriptortype descriptor type. 0x02 0x2e btotallength (lsb) number of bytes returned in this configuration. this includes the configuration descriptor plus all the interface and endpoint descriptors. 0x20 0x2f btotallength (msb) 0x00 0x30 bnuminterfaces number of interfaces supported. 0x01 0x31 bconfiguration value the value to use as an argument to set configuration to select the configuration. this value must be set to 0x01. 0x01 0x32 iconfiguration index to the configuration string. this entry must equal half of the address value where the string starts or 0x00 if the string does not exist. 0x00 table 5-6. eeprom organization (continued) eeprom address field name field description required contents suggested contents
cy7c68300 document #: 38-08011 rev. *a page 17 of 26 0x33 bmattributes device attributes for this configuration. bit descriptions 7 reserved. must be set to 1. 6 self-powered. must be set to 1. 5 remote wake-up. must be set to 0. 4-0 reserved. must be set to 0. 0xc0 0x34 bmaxpower maximum power consumption for this configuration. units used are ma*2(i.e., 0x31 = 98 ma, 0xf9 = 498 ma). 0x00 reported for self-powered devices. 0x00 high-speed interface and endpoint descriptors interface descriptor 0x35 blength length of interface descriptor in bytes. 0x09 0x36 bdescriptortype descriptor type. 0x04 0x37 binterfacenumber interface number. 0x00 0x38 balternatesetting alternate setting. 0x00 0x39 bnumendpoints number of endpoints. 0x02 0x3a binterfaceclass interface class. 0x08 0x3b binterfacesubclass interface subclass. 0x06 0x3c binterfaceprotocol interface protocol. 0x50 0x3d iinterface index to first interface string. this entry must equal half of the address value where the string starts or 0x00 if the string does not exist. 0x00 usb bulk out endpoint 0x3e blength length of this descriptor in bytes. 0x07 0x3f bdescriptortype endpoint descriptor type. 0x05 0x40 bendpointaddress this is an out endpoint, endpoint number 2. 0x02 0x41 bmattributes this is a bulk endpoint. 0x02 0x42 wmaxpacketsize (lsb) max data transfer size. 0x00 0x43 wmaxpacketsize (msb) 0x02 0x44 binterval hs interval for polling (max nak rate). 0x00 usb bulk in endpoint 0x45 blength length of this descriptor in bytes. 0x07 0x46 bdescriptortype endpoint descriptor type. 0x05 0x47 bendpointaddress this is an in endpoint, endpoint number 8. 0x88 0x48 bmattributes this is a bulk endpoint. 0x02 0x49 wmaxpacketsize (lsb) max data transfer size. 0x00 0x4a wmaxpacketsize (msb) 0x02 0x4b binterval hs interval for polling (max nak rate). 0x00 full-speed configuration descriptor 0x4c blength length of configuration descriptor in bytes. 0x09 0x4d bdescriptortype descriptor type. 0x02 0x4e btotallength (lsb) number of bytes returned in this configuration. this includes the configuration descriptor plus all the interface and endpoint descriptors. 0x20 0x4f btotallength (msb) 0x00 0x50 bnuminterfaces number of interfaces supported. 0x01 0x51 bconfiguration value the value to use as an argument to set configuration to select the configuration. 0x01 table 5-6. eeprom organization (continued) eeprom address field name field description required contents suggested contents
cy7c68300 document #: 38-08011 rev. *a page 18 of 26 0x52 iconfiguration index to configuration string. this entry must equal half of the address value where the string starts or 0x00 if the string does not exist. 0x00 0x53 bmattributes device attributes for this configuration. bit descriptions 7 reserved. must be set to 1. 6 self-powered. must be set to 1. 5 remote wake-up. must be set to 0. 4 ? 0 reserved. must be set to 0. 0xc0 0x54 bmaxpower maximum power consumption for the second configuration. units used are ma*2 (i.e. 0x31 = 98 ma, 0xf9 = 498 ma). 0x00 full-speed interface and endpoint descriptors interface descriptor 0x55 blength length of interface descriptor in bytes. 0x09 0x56 bdescriptortype descriptor type. 0x04 0x57 binterfacenumber interface number. 0x00 0x58 balternatesettings alternate settings. 0x00 0x59 bnumendpoints number of endpoints. 0x02 0x5a binterfaceclass interface class. 0x08 0x5b binterfacesubclass interface subclass. 0x06 0x5c binterfaceprotocol interface protocol. 0x50 0x5d iinterface index to first interface string. this entry must equal half of the address value where the string starts or 0x00 if the string does not exist. 0x00 usb bulk out endpoint 0x5e blength length of this descriptor in bytes. 0x07 0x5f bdescriptortype endpoint descriptor type. 0x05 0x60 bendpointaddress this is an out endpoint, endpoint number 2. 0x02 0x61 bmattributes this is a bulk endpoint. 0x02 0x62 wmaxpacketsize (lsb) max data transfer size. 0x40 0x63 wmaxpacketsize (msb) 0x00 0x64 binterval does not apply to fs bulk endpoints. must be set to 0. 0x00 usb bulk in endpoint 0x65 blength length of this descriptor in bytes. 0x07 0x66 bdescriptortype endpoint descriptor type. 0x05 0x67 bendpointaddress this is an in endpoint, endpoint number 8. 0x88 0x68 bmattributes this is a bulk endpoint. 0x02 0x69 wmaxpacketsize (lsb) max data transfer size. 0x40 0x6a wmaxpacketsize (msb) 0x00 0x6b binterval does not apply to fs bulk endpoints. must be set to 0. 0x00 string descriptor examples ( note : the values in these strings are given as examples only and should not be used in final products. designers are encouraged to modify the string values to reflect the final product, since they are what users will see with their operating systems.) usb string descriptor ? index 0 (langid) 0x6c blength langid string descriptor length in bytes. 0x04 0x6d bdescriptortype descriptor type. 0x03 table 5-6. eeprom organization (continued) eeprom address field name field description required contents suggested contents
cy7c68300 document #: 38-08011 rev. *a page 19 of 26 0x6e langid (lsb) language supported. note: see http://www.usb.org for langid documentation (the code for english is 0x0409). 0x09 0x6f langid (msb) 0x04 usb string descriptor ? manufacturer 0x70 blength string descriptor length in bytes (including blength). 0x2c 0x71 bdescriptortype descriptor type. 0x03 0x72 bstring unicode character. ? c ? 0x43 0x73 bstring ( ? nul ? )0x00 0x74 bstring unicode character. ? y ? 0x79 0x75 bstring ( ? nul ? )0x00 0x76 bstring unicode character. ? p ? 0x70 0x77 bstring ( ? nul ? )0x00 0x78 bstring unicode character. ? r ? 0x72 0x79 bstring ( ? nul ? )0x00 0x7a bstring unicode character. ? e ? 0x65 0x7b bstring ( ? nul ? )0x00 0x7c bstring unicode character. ? s ? 0x73 0x7d bstring ( ? nul ? )0x00 0x7e bstring unicode character. ? s ? 0x73 0x7f bstring ( ? nul ? )0x00 0x80 bstring unicode character. ? ? 0x20 0x81 bstring ( ? nul ? )0x00 0x82 bstring unicode character. ? s ? 0x53 0x83 bstring ( ? nul ? )0x00 0x84 bstring unicode character. ? e ? 0x65 0x85 bstring ( ? nul ? )0x00 0x86 bstring unicode character. ? m ? 0x6d 0x87 bstring ( ? nul ? )0x00 0x88 bstring unicode character. ? i ? 0x69 0x89 bstring ( ? nul ? )0x00 0x8a bstring unicode character. ? c ? 0x63 0x8b bstring ( ? nul ? )0x00 0x8c bstring unicode character. ? o ? 0x6f 0x8d bstring ( ? nul ? )0x00 0x8e bstring unicode character. ? n ? 0x6e 0x8f bstring ( ? nul ? )0x00 0x90 bstring unicode character. ? d ? 0x64 0x91 bstring ( ? nul ? )0x00 0x92 bstring unicode character. ? u ? 0x75 0x93 bstring ( ? nul ? )0x00 0x94 bstring unicode character. ? c ? 0x63 0x95 bstring ( ? nul ? )0x00 0x96 bstring unicode character. ? t ? 0x74 0x97 bstring ( ? nul ? )0x00 0x98 bstring unicode character. ? o ? 0x6f table 5-6. eeprom organization (continued) eeprom address field name field description required contents suggested contents
cy7c68300 document #: 38-08011 rev. *a page 20 of 26 0x99 bstring ( ? nul ? )0x00 0x9a bstring unicode character. ? r ? 0x72 0x9b bstring ( ? nul ? )0x00 usb string descriptor ? product 0x9c blength string descriptor length in bytes (including blength). 0x2c 0x9d bdescriptortype descriptor type. 0x03 0x9e bstring unicode character. ? u ? 0x55 0x9f bstring ( ? nul ? )0x00 0xa0 bstring unicode character. ? s ? 0x53 0xa1 bstring ( ? nul ? )0x00 0xa2 bstring unicode character. ? b ? 0x42 0xa3 bstring ( ? nul ? )0x00 0xa4 bstring unicode character. ? 2 ? 0x32 0xa5 bstring ( ? nul ? )0x00 0xa6 bstring unicode character. ? . ? 0x2e 0xa7 bstring ( ? nul ? )0x00 0xa8 bstring unicode character. ? 0 ? 0x30 0xa9 bstring ( ? nul ? )0x00 0xaa bstring unicode character. ? ? 0x20 0xab bstring ( ? nul ? )0x00 0xac bstring unicode character. ? s ? 0x53 0xad bstring ( ? nul ? )0x00 0xae bstring unicode character. ? t ? 0x74 0xaf bstring ( ? nul ? )0x00 0xb0 bstring unicode character. ? o ? 0x6f 0xb1 bstring ( ? nul ? )0x00 0xb2 bstring unicode character. ? r ? 0x72 0xb3 bstring ( ? nul ? )0x00 0xb4 bstring unicode character. ? a ? 0x61 0xb5 bstring ( ? nul ? )0x00 0xb6 bstring unicode character. ? g ? 0x67 0xb7 bstring ( ? nul ? )0x00 0xb8 bstring unicode character. ? e ? 0x65 0xb9 bstring ( ? nul ? )0x00 0xba bstring unicode character. ? ? 0x20 0xbb bstring ( ? nul ? )0x00 0xbc bstring unicode character. ? d ? 0x44 0xbd bstring ( ? nul ? )0x00 0xbe bstring unicode character. ? e ? 0x65 0xbf bstring ( ? nul ? )0x00 0xc0 bstring unicode character. ? v ? 0x76 0xc1 bstring ( ? nul ? )0x00 0xc2 bstring unicode character. ? i ? 0x69 table 5-6. eeprom organization (continued) eeprom address field name field description required contents suggested contents
cy7c68300 document #: 38-08011 rev. *a page 21 of 26 0xc3 bstring ( ? nul ? )0x00 0xc4 bstring unicode character. ? c ? 0x63 0xc5 bstring ( ? nul ? )0x00 0xc6 bstring unicode character. ? e ? 0x65 0xc7 bstring ( ? nul ? )0x00 usb string descriptor ? serial number ( note : the usb mass storage class requires a unique serial number in each device. not providing a unique serial number will crash the operating system. the serial number must be at least a minimum size of 12 characters. some hosts will only treat the last 12 characters of the serial number as unique.) 0xc8 blength string descriptor length in bytes (including blength). 0x22 0xc9 bdescriptor type descriptor type. 0x03 0xca bstring unicode character. ? 1 ? 0x31 0xcb bstring ( ? nul ? )0x00 0xcc bstring unicode character. ? 2 ? 0x32 0xcd bstring ( ? nul ? )0x00 0xce bstring unicode character. ? 3 ? 0x33 0xcf bstring ( ? nul ? )0x00 0xd0 bstring unicode character. ? 4 ? 0x34 0xd1 bstring ( ? nul ? )0x00 0xd2 bstring unicode character. ? 5 ? 0x35 0xd3 bstring ( ? nul ? )0x00 0xd4 bstring unicode character. ? 6 ? 0x36 0xd5 bstring ( ? nul ? )0x00 0xd6 bstring unicode character. ? 7 ? 0x37 0xd7 bstring ( ? nul ? )0x00 0xd8 bstring unicode character. ? 8 ? 0x38 0xd9 bstring ( ? nul ? )0x00 0xda bstring unicode character. ? 9 ? 0x39 0xdb bstring ( ? nul ? )0x00 0xdc bstring unicode character. ? 0 ? 0x30 0xdd bstring ( ? nul ? )0x00 0xde bstring unicode character. ? a ? 0x41 0xdf bstring ( ? nul ? )0x00 0xe0 bstring unicode character. ? b ? 0x42 0xe1 bstring ( ? nul ? )0x00 0xe2 bstring unicode character. ? c ? 0x43 0xe3 bstring ( ? nul ? )0x00 0xe4 bstring unicode character. ? d ? 0x44 0xe5 bstring ( ? nul ? )0x00 0xe6 bstring unicode character. ? e ? 0x45 0xe7 bstring ( ? nul ? )0x00 0xe8 bstring unicode character. ? f ? 0x46 0xe9 bstring ( ? nul ? )0x00 0xea to 0xff unused rom space amount of unused rom space will vary depending on strings. 0xff table 5-6. eeprom organization (continued) eeprom address field name field description required contents suggested contents
cy7c68300 document #: 38-08011 rev. *a page 22 of 26 6.0 absolute maximum ratings storage temperature ............................................................................................................ .............................. ? 65 c to +150 c ambient temperature with power supplied ........................................................................................ .................... 0 c to +55.4 c supply voltage to ground potential ............................................................................................. .......................... ? 0.5v to +4.0v dc input voltage to any input pin .............................................................................................. ..........................................5.25v dc voltage applied to outputs in high-z state .................................................................................. ........> ? 0.5v to v cc + 0.5v power dissipation .............................................................................................................. ............................................> 936 mw static discharge voltage ....................................................................................................... ...............................................2000v max output current per io port ................................................................................................. ..........................................10 ma 7.0 operating conditions [3] t a (ambient temperature under bias) .............................................................................................. ....................... 0 c to +70 c supply voltage ................................................................................................................. ...................................... +3.0v to +3.6v ground voltage ................................................................................................................. .........................................................0v f osc (oscillator or crystal frequency) ............................................................................................. ................ 24 mhz 100 ppm ............................................................................................................................... ............................................parallel resonant note: 3. if an alternate clock source is input on xtalin it must be supplied with standard 3.3v signaling characteristics and xtalout must be left floating. 8.0 dc characteristics 9.0 ac electrical characteristics 9.1 usb transceiver complies with the usb 2.0 specification. 9.2 ata timing the ata interface supports ata pio modes 0, 3, and 4, and ultra dma modes 2 and 4 per the ata specification t13/1410d rev. 3b. parameter description conditions min. typ. max. unit v cc supply voltage 3.0 3.3 3.6 v v ih input high voltage 2 5.25 v v il input low voltage ? 0.5 0.8 v i i input leakage current 0 < v in < v cc + 10 a v oh output voltage high i out = 4ma 2.4 v v ol output voltage low i out = ? 4ma 0.4 v i oh output current high 4ma i ol output current low 4ma c in input pin capacitance all but d+/d ? 10 pf only d+/d ? 15 pf i sup suspend current including 1.5k integrated pull-up 250 400 a i cc supply current usb high speed 235 260 ma i cc supply current usb full speed 90 150 ma
cy7c68300 document #: 38-08011 rev. *a page 23 of 26 10.0 ordering information 11.0 package diagrams part number package type cy7c68300 56 ssop cy7c68300 56 qfn cy4615 ez-usb at2 reference design kit figure 11-2. 56-lead quad flatpack no lead (8 x 8 mm) lf56 51-85062-*c figure 11-1. 56-lead shrunk small outline package 056 56-lead qfn (8 x 8 mm) 51-85144-*b
cy7c68300 document #: 38-08011 rev. *a page 24 of 26 12.0 pcb layout recommendations [4] the following recommendations should be followed to ensure reliable high-performance operation. four-layer impedance controlled boards are required to maintain signal quality. usb connector shell must be tied to ground near the connector. bypass/flyback caps on vbus, near connector, are recommended. dplus and dminus trace lengths should be kept to within 2 mm of each other, with preferred length of 20-30 mm. maintain a solid ground plane under the dplus and dminus traces. do not allow the plane to be split under these traces. do not place vias on the dplus or dminus trace routing. isolate the dplus and dminus traces from all other signal traces by no less than 10 mm. 13.0 quad flat package no leads (qfn) package design notes electrical contact of the part to the printed circuit board (pcb) is made by soldering the leads on the bottom surface of the package to the pcb. hence, special attention is required to the heat transfer area below the package to provide a good thermal bond to the circuit board. a copper (cu) fill is to be designed into the pcb as a thermal pad under the package. heat is transf erred from the at2 through the device ? s metal paddle on the bottom side of the package. heat from here is conducted to the pcb at the thermal pad. it is then conducted from the thermal pad to the pcb inner ground plane by a 5 x 5 array of via. a via is a pl ated through-hole in the pcb with a finished diameter of 13 mil. the qfn ? s metal die paddle must be soldered to the pcb ? s thermal pad. solder mask is placed on the board top side over each via to resist solder flow into the via. the mask on the top side als o minimizes outgassing during the solder reflow process. for further information on this package design please refer to the application note ? surface mount assembly of amkor ? s microleadframe (mlf) technology. ? this application note can be downloaded from amkor ? s website from the following url http://www.amkor.com/products/notes_papers/mlf_appnote_0301.pdf. the application note provides detailed information on board mounting guidelines, soldering flow, rework process, etc. figure 13-1 below display a cross-sectional area underneath the package. the cross section is of only one via. the solder paste template needs to be designed to allow at least 50% solder coverage. the thickness of the solder paste template should be 5 mil. it is recommended that ? no clean ? , type 3 solder paste is used for mounting the part. nitrogen purge is recommended during reflow. figure 13-2 is a plot of the solder mask pattern and figure 13-3 displays an x-ray image of the assembly (darker areas indicate solder.) note: 4. source for recommendations: high speed usb platform design guidelines , http://www.usb.org/developers/data/hs_usb_pdg_r1_0.pdf. figure 13-1. cross-section of the area underneath the qfn package 0.017 ? dia solder mask cu fill cu fill pcb material pcb material 0.013 ? dia via hole for thermally connecting the qfn to the circuit board ground plane. this figure only shows the top three layers of the circuit board: top solder, pcb dielectric, and the ground plane
cy7c68300 document #: 38-08011 rev. *a page 25 of 26 ? cypress semiconductor corporation, 2002. the information contained herein is subject to change without notice. cypress semico nductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress semiconductor product. nor does it convey or imply any license unde r patent or other rights. cypress semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected t o result in significant injury to the user. the inclusion of cypress semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in do i ng so indemnifies cypress semiconductor against all charges. 14.0 other design considerations certain design considerations must be followed to ensure proper operation of the ez-usb at2. the following items should be taken into account when designing a usb device with the ez-usb at2. 14.1 proper power-up sequence power must be applied to the ez-usb at2 before, or at the same time as the ata/atapi device. if power is supplied to the drive first, the ez-usb at2 will start up in an undefined state. designs that utilize separate power supplies for the ez-usb at2 and the ata/atapi device are not recommended. 14.2 ide removable media devices the ez-usb at2 does not fully support ide removable media devices. changes in media state are not reported to the operating system so users will be unable to eject/reinsert media properly. this may result in lost or corrupted data. 14.3 devices with small buffers the size of the ata/atapi device ? s buffer can greatly affect the overall data transfer performance. care should be taken to ensure that devices have large enough buffers to handle the flow of data to/from the drive. the exact buffer size needed depends on a number of variables, but a good rule of thumb is: (aprox min buffer size) = (data rate) * (seek time + rotation time + other) where (other) may include things like time to switch heads, power up a laser, etc. devices with buffers that are too small to h andle the extra data may perform considerably slower than expected. purchase of i 2 c components from cypress, or one of its sublicensed associated companies, conveys a license under the philips i 2 c patent rights to use these components in an i 2 c system, provided that the system conforms to the i 2 c standard specification as defined by philips. ez-usb at2 is a trademark, and ez-usb is a registered trademark, of cypress semiconductor. all product and company names mentioned in this document are the trademarks of their respective holders. figure 13-2. plot of the solder mask (white area) figure 13-3. x-ray image of the assembly
cy7c68300 document #: 38-08011 rev. *a page 26 of 26 description title: cy7c68300 ez-usb at2 ? usb 2.0 to ata/atapi bridge document number: 38-08011 rev. ecn no. issue date orig. of change description of change ** 111608 05/15/02 bha new data sheet *a 116660 08/30/02 bha added new 56 pin quad flatpack no lead package and pinout. revised pin description table to reflect new package. added typical reset diagram. removed advance information.

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